FPGA Embedded Design, Part 4 - Microprocessor Design
Genre: eLearning | MP4 | Video: h264, 1280x720 | Audio: aac, 44100 Hz
Language: English | VTT | Size: 1.71 GB | Duration: 5 hours

What you'll learn
How a CPU works.
How to design a CPU core of your own.
How to design an Instruction Set Architecture
How to design a CPU core in Verilog.
How to synthesize a CPU core for Altera and Xilinx FPGAs.

Requirements
The Verilog Hardware Description Language.
FPGA Design.
Knowledge of any Electronic Design Automation Tool for FPGAs.
Description
It's time to take on a Challenge! How does designing a CPU sound?

In this fourth part of the FPGA Embedded Design series, we'll design a CPU from scratch to finally get it up and running on several platforms.

We'll write most of the code in the Vivado Design Suite, but you'll have the chance to see it working as well in Quartus Prime, EDA Playground or LabsLand, so you can follow along with your favorite tools. The FPGA boards we'll use are the BASYS3, by Digilent (with a Xilinx FPGA), and the DE0-CV from Terasic (with an Intel FPGA).

This course consists of three main parts:

Foundations of Computer Architecture, where we'll cover the essentials of CPU design and jargon.