Mar

23

2021

Mentor Graphics QuestaSim 2021.1

mitsumi 23 Mar 2021 05:51 WINDOWS APPS

Mentor Graphics QuestaSim  2021.1


Mentor Graphics QuestaSim 2021.1 | 689.3 mb

Mentor, a Siemens business, is pleased to announce the availability of QuestaSim 2021.1 comprehensive platform for verification complex designs. Questa is built on a core simulation and debug engine providing the industry's most complete native support of Verilog, SystemVerilog, VHDL, SystemC, PSL and UPF.

General Defects Repaired in 2021.1
QSIM-55060 - Running vopt to re-generate an existing optimized design after the work library had been moved in the file system would sometimes produce an error message involving the original file pathnames. The behavior has been fixed, and vopt will now re-generate the optimized design.
QSIM-68141 - (results) Some VCD files contain extended (VHDL) identifiers. The vcd2wlf and vcd2qwave tools did not always read these identifiers correctly. This has been corrected.

SystemVerilog Defects Repaired in 2021.1
QSIM-62161 - (results) In some rare cases, randomize() would incorrectly evaluate a constraint involving a dist/inside/unique construct with an indexed multi-dimensional array (where the index is random) on the RHS. This issue has been fixed.
QSIM-62470 - In some rare cases, a randomize() call with an in-line constraint that references a static class field would cause vo

Power Aware Enhancements in 2021.1
QSIM-56976 - Enhanced the waiver mechanism / exclusion support for PA dynamic Checks. More ways to control the PA dynamic checks at vopt/vsim.

Mentor Graphics QuestaSim  2021.1



QuestaSimis part of the Questa Advanced Functional Verification Platform and is the latest tool in Mentor Graphics tool suite for Functional Verification. The tool provides simulation support for latest standards of SystemC, SystemVerilog, Verilog 2001 standard and VHDL. This tool is an advancement over Modelsim in its support for advanced Verification features like coverage databases, coverage driven verification, working with assertions, SystemVerilog constrained-random functionality.

A demonstration of compiling, simulating, and debugging SystemVerilog code with Mentor's Questa simulator

Mentor Graphicsis a technology leader in electronic design automation (EDA), providing software and hardware design solutions that enable companies to develop better electronic products faster and more cost-effectively. The company offers innovative products and solutions that help engineers overcome the design challenges they face in the increasingly complex worlds of board and chip design. Mentor Graphics has the broadest industry portfolio of best-in-class products and is the only EDA company with an embedded software solution.

Product:Mentor Graphics QuestaSim
Version:2021.1
Supported Architectures:x64
Website Home Page :www.mentor.com
Language:english
System Requirements:PC *
Size:689.3 mb

Base Product Specifications in 2021.1

Supported Platforms
- Windows 10 x86/x64

It is expected that you have a standard installation of the operating system that you are going to use to install Questa SIM. Where applicable, this includes libraries recommended by operating system vendors to enable 32-bit applications to run on a 64-bit installation.

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